Synopsys Users Group (SNUG) Taiwan 2024 demonstrated the state-of-the-art EDA innovations and Artificial intelligence (AI) driven solutions for the chip design community.
With the theme of "Our Technology, Your Innovation," this annual event took place on June 19, 2024, and showed how Synopsys uses its advanced technology to help customers forge success with innovation. Joachim Kunkel, Synopsys General Manager of Solutions Group, delivered a keynote titled "Powering Innovation in the Era of Pervasive Intelligence."
Kunkel said, "AI technology has brought unprecedented new opportunities to the industry. All of this will drive an explosion of intelligent systems and smart applications. But this is also pushing the limits of computing and energy resources. Synopsys' solutions will support customers to cope with these challenges."
The Pervasive Intelligence era is coming
Synopsys highlights three key paradigms driving the era of Pervasive Intelligence. That is the rapid advancement of AI, silicon proliferation, and software-defined systems.
These days, more electronic products are now driven by sophisticated software. The rapid acceleration of AI technology is empowered and embedded in various smart devices and systems.
A huge number of AI chips will be required to achieve these benefits. These efforts will increase the proliferation of silicon, which is powering AI acceleration, bringing it to multiple applications controlled by sophisticated software. This will lead to the burst of Software-Defined Systems.
Together, these three paradigms are shaping the new era of pervasive intelligence, where AI and smart technologies are seamlessly integrated into our daily lives. Whether it is PCs, smartphones, autonomous driving cars, or industrial automation systems and robots, behind these systems are the technological foundations of AI chips and integrated software that will help us find better ways of doing things to achieve better outcomes. All these efforts support the exponential growth of the semiconductor industry.
However, three key challenges immediately arise including silicon complexity, productivity, and software-defined system capabilities. To respond to these challenges, Synopsys provides solutions ranging from New AI-driven EDA tools, IP offerings and Systems Design Solutions.
AI across the entire EDA flow from Synopsys.ai to Synopsys.ai Copilot
Solving the silicon complexity challenge, the engineering team is dealing with projects such as trillion transistor counts in a single chip. Considering performance, Power Performance and Area (PPA) improvements, Synopsys provides the AI-driven EDA suite Synopsys.ai for a chip design spanning implementation, verification, testing, and simulation to manufacturing processes.
These autonomous AI-driven full-stack EDA suite launched in 2020 and has achieved hundreds of successful tape-outs that supported customers' gaining project goals. In 2022, Synopsys also implemented a set of AI-driven data analytics solutions that allow insightful analysis of the vast amount of data collected on the customer side and released the Synopsys.da product line.
In addition, with the introduction of Synopsys.ai Copilot, Synopsys is harnessing the power of generative AI to help design teams with new levels of productivity. Integrated into the full Synopsys EDA stack, Synopsys.ai Copilot allows design engineering teams to be more flexible in the use of customized data sets and facilitates internal deployment of physical isolation to meet data security requirements.
The integration of generative AI capabilities is just the latest step in the journey to drive greater productivity for solving silicon complexity challenges. These AI-assisted tools will continue to evolve, and new tools will bring continuous design creativity.
Synopsys Expands Silicon IP Portfolio to help customers to drive productivity
In addition to providing full stack of AI-driven EDA solutions, Synopsys further reduces customers' chip design burden through the offering of silicon intellectual property (IP). Synopsys is a leading provider of silicon-proven semiconductor IP solutions for SoC designs and partners with customers and collaborators to enhance their next-generation designs, incorporating new features to reduce the complexity of large-scale chip design.
It is worth mentioning that Synopsys continues to expand its IP product portfolio with a design team of 2,000 engineers. After 2020, the offerings further expand to use subsystems as an extension of IP products to help customers' AI chip projects enhance the standard architecture for their next-generation designs, incorporating new features now available with the latest specifications, which will further shorten the design process.
As part of its efforts to drive mainstream adoption of multi-die design, Synopsys has successfully demonstrated the first silicon-proven UCIe-connected and a result of collaboration between Synopsys and its foundry partners. UCIe's high-speed data transmission features will continue to assist in the design of multi-die systems in the future.
This is an important foundation for High-Performance Computing (HPC) and AI chips that require large amounts of data transmission and processing capabilities. Synopsys helps customers to stay competitive in a market where new standard developments are already being adopted.
The development of 2.5D, 3D, and even 3.5D multi-die heterogeneous integrated chips will continue to evolve. Moreover, a broad IP portfolio, an end-to-end, AI-driven EDA platform, and the most advanced multi-die solutions will boost the development and enable the march to trillions of transistors IC innovation.
Digital twins of electronic devices enhance software-defined systems prototyping
With software-defined systems, taking the example of the modern car with its 500 million lines of code, in which operations and enablement of new features are primarily managed through software, verification, and validation of these systems are dominating the cost of product development. For these products, digital twins enable a dramatic reduction in cost and design risks.
In response to the design requirements of software-defined systems, software simulation, and verification have become important requirements. For faster, higher capacity emulation and prototyping, Synopsys provides system-level design and simulation tools to verify the real software execution to ensure the correct operation and use of software-defined systems.
The HAPS-100 12 virtual prototyping solution is targeting high-capacity FPGA-based prototyping with a mix of fixed and flexible interconnects and a rack-friendly design, particularly useful for prototyping big designs that require many FPGAs, such as multi-die systems and large SoCs.
Meanwhile, the ZeBu EP2 hardware simulation system is the latest version in the Synopsys ZeBu EP family of unified emulation and prototyping systems with the fastest emulation and prototyping platform for AI workloads, making it ideal for software bring-up, hardware validation, and power performance analysis. Both systems can help customers reduce design risks and provide automotive engineering teams with digital twin applications of vehicle electronic systems to facilitate automotive software and ensure that increasingly complex semiconductor designs and high-function software systems can be integrated and operated smoothly as expected.
Kunkel pointed out that AI-driven EDA tools are developing rapidly to assist engineers in solving problems. By automating tedious repetitive tasks and optimizing design process flow, AI can free up the mental bandwidth of design engineers for the creative work that drives growth.
His advice to engineers is: By continually analyzing data and learning optimal approaches through AI-driven EDA solutions, engineers still need to go back to the role of a designer to focus on design and creative work that drives innovation and growth. Learning more about application areas and system architectures will help engineers understand how to design things and make your work more fun.
